Method for manufacturing semiconductor device

ABSTRACT

A method for manufacturing a semiconductor device comprises etching a semiconductor substrate having an insulation film as mask using a mixed gas composed of HBr and CHF3, thereby having a reaction product composed of the semiconductor substrate and reaction gas to be adhered gradually on the side walls of the mask, and as a result creating a trench having a sufficient roundness formed to the upper end portion thereof.

FIELD OF THE INVENTION

[0001] The present invention relates to a method for manufacturing asemiconductor device, and especially relates to a manufacturing methodfor creating a trench on a semiconductor substrate using plasma.

DESCRIPTION OF THE RELATED ART

[0002] Along with the advance in the integration of semiconductordevices, it has become indispensable to reduce the element isolationdistance utilizing trench isolation technology, which is a technique forisolating elements in a semiconductor device. According to trenchisolation, a trench is formed on the semiconductor substrate, but if theupper surface of the semiconductor substrate, the side walls of thetrench and the bottom surface of the trench are joined linearly, it isknown that electric field concentration occurs at the joints (endregions). It is considered that crystal defect at the end region andunevenness of the padoxide film are the causes of such electric fieldconcentration. This problem can be solved by rounding off the upper endportion and the lower end portion of the trench.

[0003] For example, Japanese Patent Laid-Open Provisional PublicationNo. 2001-345375 discloses rounding off the upper end portion of thetrench using reactive gas containing HBr and CF4 with a remaining resistmask layer used as the mask.

[0004] According to the above example where the resist is used as themask for rounding off the upper end of the trench in processing thesemiconductor substrate, consideration is made on the possiblecontamination of the semiconductor substrate caused by the resist whichmay affect the semiconductor characteristics, so in some cases afterusing the resist as mask to process the insulating layer on thesemiconductor substrate, the resist is removed and the insulation layeris used as the mask to form the trench on the semiconductor substrate.According to such example, however, it is difficult to create asufficient roundness to the upper end portion of the trench when anetching gas selected in expectation of the reaction product with theresist is used.

SUMMARY OF THE INVENTION

[0005] The object of the present invention is to solve the problems ofthe prior art. The present invention provides a method for manufacturinga semiconductor device comprising forming openings to the insulationlayer using a resist as the mask, removing the resist, and processingthe semiconductor substrate utilizing the insulation layer as the maskto create a sufficient roundness to the upper end of the trench of thesemiconductor substrate.

[0006] In order to solve the prior art problems, the present inventionutilizes a surface processing device comprising a vacuum chamber, ameans for generating plasma within the chamber, a sample stage ontowhich the sample receiving surface processing using plasma is mounted,and a power source for applying high frequency voltage to the samplestage, wherein a semiconductor substrate having an insulation layer asmask is etched using mixed gas including HBr gas and CHF3 gas, thereaction product thereof being adhered to the side walls of the pattern,and then performing fine etching of the adhered side walls so as tocreate a rounding having sufficient size to the upper end of the trench.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007]FIG. 1 illustrates the outline of the etching device utilized inthe explanation of the embodiment of the present invention;

[0008]FIG. 2 is a cross-sectional view illustrating the main portion ofthe semiconductor substrate explaining the embodiment of the presentinvention;

[0009]FIG. 3 is a cross-sectional view illustrating the main portion ofthe semiconductor substrate explaining another embodiment of the presentinvention; and

[0010]FIG. 4 is a cross-sectional view illustrating the main portion ofthe semiconductor substrate explaining another embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0011] A preferred embodiment of the present invention will now beexplained with reference to FIGS. 1 and 2.

[0012]FIG. 1 illustrates in detail the plasma generation unit of theplasma processing device. The present embodiment utilizes UHF waves andmagnetic field as means for generating plasma. According to FIG. 1,reference number 1 denotes an antenna for introducing the UHF waves, 2denotes a solenoid coil for generating a magnetic field, 3 denotes a UHFwave transmission window (such as a silica plate), 4 denotes a vacuumchamber, 5 denotes a sample stage for mounting a sample which is awafer, 6 denotes a driving mechanism for moving the stage up and down, 7denotes a high frequency power source for applying high frequency biasvoltage to the sample stage during plasma treatment such as etching, and8 denotes a static attraction power source for statically attracting andsupporting the wafer mounted on the sample stage. In the interior of thevacuum chamber 4, an earth electrode 9 being a ground potential memberis disposed near the sample stage 5 also being an electrode. The earthelectrode 9 is set to ground potential, which is mounted to the innerside of the vacuum chamber 4 functioning so as to secure the electricalconductivity between the vacuum chamber 4 and plasma 10.

[0013] According to this device, when providing an etching treatment toa wafer (sample), process gas is introduced to the interior of thevacuum chamber 4 which is evacuated by a vacuum pump (not shown) and aturbo molecular pump (not shown). The pressure within the vacuum chamberis adjusted by a variable valve (not shown), and then UHF waves areintroduced to the interior of the chamber using the antenna 1.

[0014] By the function of the magnetic field created by the solenoidcoil 2 wound around the exterior of the vacuum chamber 4 and the UHFwaves introduced by the antenna 1 through the UHF wave transmissionwindow 3, the electrons within the process gas receive energyefficiently, thereby generating a high-density plasma 10 by electroncyclotron resonance (hereinafter abbreviated ECR). After the plasma 10is generated, the static attraction power source 8 outputs DC voltagefor attracting the wafer on the sample stage 5. After the wafer isattracted on the stage 5, high frequency bias voltage is output from thehigh frequency power source 7 to start the processing.

[0015]FIG. 2 illustrates a method for manufacturing the semiconductordevice according to a preferred embodiment of the present inventionutilizing the device shown in FIG. 1.

[0016] The preferred embodiment of the present invention will now beexplained with reference to FIG. 2.

[0017] As shown in FIG. 2, a resist 15 is already patternedcorresponding to exposure regions. The patterned resist 15 is used as apattern to perform etching to a mask composed of a pad oxide film 12 anda silicon nitride 11 using a dedicated etching device. Thereafter, aseparate ashing device is used to remove the resist, and then either theabove-mentioned etching device or another etching device is used to etchthe silicon substrate 13 using a mixed gas including CHF3 and HBr asetching gas.

[0018] A first etching is performed for 15 seconds with the etchingconditions set so that the pressure is 2.0 Pa and the gas flow ratio ofHBr/CHF3 at this time is substantially 5/1 (the ratio of the amount ofCHF3 gas against HBr gas being approximately 20%), while addingapproximately 3 mL/min of O₂ gas for controlling the reaction product onthe wafer surface. Thereafter, a second etching is performed utilizingCL2, O₂ and HBr gas to form the main trench portion.

[0019] During the first etching, a reaction product caused by siliconsubstrate 13 and etching gas is gradually adhered onto the side surfacesof the mask as side walls 14. At this time, the silicon substrate 13 isanisotropically etched, thus the finished cross-section has a forwardtaper shape.

[0020] The shape of the forward taper can be controlled by adjusting theadded O2 gas, the total gas flow, the pressure and so on.

[0021] Thereafter, the second etching is performed to realize elementisolation. At this time, the side walls 14 created (adhered) by thefirst etching is also somewhat etched, so the upper end portionprojecting in the element isolation region is also etched, thus beingconnected smoothly with the second etched portion.

[0022] If it is not desirable to greatly etch the upper end projectingin the element isolation region, a mixed gas including HBr, O₂ and CF4can be used to form the main trench portion.

[0023] Next, FIG. 3 is referred to in explaining the example where it ispreferable to etch greatly the upper end projected in the elementisolation region.

[0024] The embodiment illustrated in FIG. 3 is different from that ofFIG. 2 in that according to FIG. 3, the first etching time is reducedfrom approximately 15 seconds to about 5 seconds (the wafer biasunchanged, which is approximately 100W), and then after reducing thewafer bias from approximately 100W to 20W, performing etching for about10 seconds. According to such etching conditions and etching steps, itis possible to vary the angle of the taper and to provide roundness in amore aggressive manner.

[0025] Moreover, since it is desirable to provide sufficient roundnessto the lower end of the trench, it is possible to etch the bottomportion of the trench by adjusting the power supplied by the highfrequency power source or by utilizing HBr, O₂ and CF4 gas.

[0026] Next, with reference to FIG. 4, the etching process performed toprovide roundness to the bottom surface of the trench portion will beexplained.

[0027] According to the embodiment of FIG. 4, at approximately 80-90% ofthe desired trench depth, the wafer bias is reduced from approximately100W to 20W before performing further etching, thus creating asufficient roundness.

[0028] As explained, the present embodiment enables to create asufficient roundness to the upper end portion of the trench formed tothe semiconductor substrate without having to perform processes otherthan etching, such as deposition and thermal oxidation, to thesemiconductor device.

[0029] Although the present embodiment is explained where UHF waves andmagnetic field are used as means for generating plasma, but the presentinvention is not limited to such example. In other words, the presentinvention can not only be applied to ECR plasma systems, but also tosemiconductor devices utilizing other plasma systems such as RF plasma.

[0030] According to the present invention, by processing a resist as amask, removing the resist, and utilizing an insulation film as mask onthe semiconductor substrate when etching the substrate so that thereaction product is adhered on the side walls of the mask, a sufficientroundness is created to the upper end portion of the trench.

1. A method for manufacturing a semiconductor device comprising thesteps of: forming a multilayer film including an insulation film on asemiconductor substrate; forming a resist mask by patterning a resistapplied on said multilayer film; etching said multilayer film using saidresist mask; removing said resist mask after completing said etching;and processing said semiconductor substrate to create a trench utilizingsaid multilayer film having removed said resist as mask.
 2. A method formanufacturing a semiconductor device comprising forming a multilayerfilm including an insulation film on a semiconductor substrate,subsequently patterning a resist to create a resist mask, subsequentlyetching said multilayer film, subsequently removing said resist mask,and subsequently processing said semiconductor substrate to create atrench utilizing as mask said multilayer film having removed of saidresist mask.
 3. A method for manufacturing a semiconductor devicecomprising the steps of: forming a mask layer having openingscorresponding to element isolation regions on a semiconductor substrate;etching said semiconductor substrate utilizing said mask layer as maskto form upper end portions of a trench in tapered shape; and etchingsaid semiconductor substrate utilizing said mask layer as mask to formthe main trench portion.